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Section 1 Overview
R01UH0134EJ0400 Rev. 4.00 Page 45 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
PAD
Output data
Output enable
Latch enable
Figure 1.3 (5) Simplified Circuit Diagram (Output Buffer with Enable, with Latch)
PAD
Output data
Output enable
Latch enable
TTL input data
TTL input enable
Figure 1.3 (6) Simplified Circuit Diagram (Bidirectional Buffer,
TTL AND Input, with Latch)
PAD
Output data
Output enable
Latch enable
Schmitt input data
Schmitt input enable
Figure 1.3 (7) Simplified Circuit Diagram (Bidirectional Buffer, Schmitt AND Input,
with Latch)