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Section 37 Electrical Characteristics
Page 2014 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
Read
Note: * The waveform for DACKn and TENDn is when active low is specified.
Write
CKIO
A25 to A0
CExx
RD/WR
ICIORD
D15 to D0
ICIOWR
D15 to D0
BS
WAIT
t
WTS
t
AD1
t
CSD1
t
RWD1
t
AD1
t
CSD1
t
RWD1
t
BSD
t
BSD
DACKn
TENDn*
t
DACD
t
DACD
t
WDH1
t
WDD1
t
ICWSD
t
ICWSD
t
ICRSD
t
ICRSD
t
RDH1
t
RDS1
t
WTH
t
WTH
t
WTS
IOIS16
Tpci1w Tpci2Tpci0 Tpci1 Tpci1w
Tpci0w Tpci2wTpci1w Tpci1w
t
IO16H
t
IO16S
Figure 37.39 PCMCIA I/O Card Bus Cycle
(TED = 2 Cycles, TEH = 1 Cycle, Software Wait Cycle 0, Hardware Wait Cycle 1)