Filter
Top Products
Section 15 Serial Communication Interface with FIFO
R01UH0134EJ0400 Rev. 4.00 Page 741 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
15.3.10 FIFO Data Count Set Register (SCFDR)
SCFDR is a 16-bit register which indicates the quantity of data stored in the transmit FIFO data
register (SCFTDR) and the receive FIFO data register (SCFRDR).
It indicates the quantity of transmit data in SCFTDR with the upper 8 bits, and the quantity of
receive data in SCFRDR with the lower 8 bits. SCFDR can always be read by the CPU.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
RRRRRRRRRRRRRRRR
Bit:
Initial value:
R/W:
- - - T[4:0] - - - R[4:0]
Bit Bit Name
Initial
Value R/W Description
15 to 13 All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
12 to 8 T[4:0] 00000 R T4 to T0 bits indicate the quantity of non-transmitted
data stored in SCFTDR. H'00 means no transmit data,
and H'10 means that SCFTDR is full of transmit data.
7 to 5 All 0 R Reserved
These bits are always read as 0. The write value should
always be 0.
4 to 0 R[4:0] 00000 R R4 to R0 bits indicate the quantity of receive data stored
in SCFRDR. H'00 means no receive data, and H'10
means that SCFRDR full of receive data.