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Section 37 Electrical Characteristics
R01UH0134EJ0400 Rev. 4.00 Page 2027 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
37.4.11 Serial I/O with FIFO Timing
Table 37.15 Serial I/O with FIFO Timing
Item Symbol Min. Max. Unit Figure
SCK_SIO clock input/output cycle time t
SIcyc 80 ns Figures
37.56 to
37.58
SCK_SIO output high width tSWHO 0.4 tSIcyc Figures
37.56,
37.57
SCK_SIO output low width tSWLO 0.4 tSIcyc
SIOFSYNC output delay time tFSD 5 20
SCK_SIO input high width tSWHI 0.4 tSIcyc Figure
37.58
SCK_SIO input low width tSWLI 0.4 tSIcyc
SIOFSYNC input setup time tFSS 20
SIOFSYNC input hold time tFSH 20
TXD_SIO output delay time tSTDD 5 20 Figures
37.56 to
37.58
RXD_SIO input setup time tSRDS 20
RXD_SIO input hold time tSRDH 20
SCK_SIO (output)
SIOFSYNC (output)
TXD_SIO
RXD_SIO
t
SIcyc
t
SWLO
t
SWHO
t
FSD
t
STDD
t
STDD
t
SRDS
t
SRDH
t
FSD
Figure 37.56 Transmission and Reception Timing
(Master Mode 1, Sampled at Falling Edge)