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Section 20 Controller Area Network
R01UH0134EJ0400 Rev. 4.00 Page 1025 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
TEC/REC (Address = H'00C)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Bit:
Initial value:
R/W:
0000000000000000
R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W* R/W*
TEC7 TEC6 TEC5 TEC4 TEC3 TEC2 TEC1 TEC0 REC7 REC6 REC5 REC4 REC3 REC2 REC1 REC0
Note: * It is only possible to write the value in test mode when TST[2:0] in MCR is 3'b100.
REC is incremented during Bus Off to count the recurrences of 11 recessive bits as
requested by the Bus Off recovery sequence.
20.3.4 Mailbox Registers
The following sections describe Mailbox registers that control/flag individual Mailboxes. The
address is mapped as follows.
Important: LongWord access is carried out as two consecutive Word accesses.