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Section 24 A/D Converter
R01UH0134EJ0400 Rev. 4.00 Page 1279 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
24.4.6 External Trigger Input Timing
A/D conversion can also be externally triggered. When the TRGS[3:0] bits in ADCSR are set to
B'1001, an external trigger is input to the ADTRG pin. The ADST bit in ADCSR is set to 1 at the
falling edge of the ADTRG pin, thus starting A/D conversion. Other operations, regardless of the
operating mode, are the same as when the ADST bit has been set to 1 by software. Figure 24.6
shows the timing.
Bφ
ADST
A/D conversion
ADTRG
Internal trigger
signal
Figure 24.6 External Trigger Input Timing