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Section 26 USB 2.0 Host/Function Module
Page 1350 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
26.3.1 System Configuration Control Register (SYSCFG)
SYSCFG is a register that enables high-speed operation, selects the host controller function or
function controller function, controls the DP and DM pins, and enables operation of this module.
This register is initialized by a power-on reset.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit:
Initial value:
R/W:
0000000000000000
RRRRR RRR/WR/W R/W R/W R/W R R R R/W
————— ——HSESCKE DCFM DRPD DPRPU — — USBE—
Bit Bit Name
Initial
Value R/W Description
15 to 11 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.
10 SCKE 0 R/W USB Module Clock Enable
Stops or enables supplying 48-MHz clock signal to
this module.
0: Stops supplying the clock signal to the USB
module.
1: Enables supplying the clock signal to the USB
module.
When this bit is 0, only this register and the BUSWAIT
register allow both writing and reading; the other
registers in the USB module allows reading only.
9, 8 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.