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Section 25 NAND Flash Memory Controller
R01UH0134EJ0400 Rev. 4.00 Page 1317 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
25.3.15 4-Symbol ECC Processing Result Register n (FL4ECCRESn) (n = 1 to 4)
FL4ECCRESn is a 32-bit read-only register that stores the error correction pattern for the nth error
generated by the 4-symbol ECC circuits and the address for the nth error. The contents of this
register become valid when bits 23 (4EECEN) and 22 (4ECCCORRECT) are set to 1 and a
correction pattern has been generated by the setting of the 4-symbol ECC control register
(FL4ECCCR).
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
151413121110987654321
0
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
RRRRRRRRRRRRRRRR
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
RRRRRRRRRRRRRRRR
- - - - - - LOCn[9:0]
------ PATn[9:0]
Bit Bit Name
Initial
Value R/W Description
31 to 26 Undefined R Reserved
These bits are always read as 0. The write value should
always be 0.
25 to 16 LOCn[9:0] Undefined R nth Error Address Indication
Indicates the address of the nth error of the four errors.
Since one sector is handled as 528 bytes, the valid
address range is from H'000 to H'20F. Addresses
beyond the range from H'000 to H'20F are invalid (and
indicate that generation of an error pattern was not
possible or that there were no errors).
The initial value is H'3FF.
The values of these bits that are set after the
4ECCEND bit in the 4-symbol ECC control register is
set to 1 are valid. Note that starting to read out the data
for the next sector before reading these bits will destroy
the data.
15 to 10 Undefined R Reserved
These bits are always read as 0. The write value should
always be 0.