Filter
Top Products
Section 8 Cache
Page 228 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
8.4.4 Usage Notes
1. Programs that access memory-mapped cache of the operand cache should be placed in a cache-
disabled space. Programs that access memory-mapped cache of the instruction cache should be
placed in a cache-disabled space, and in each of the beginning and the end of that, two or
more read accesses to on-chip peripheral modules or external address space (cache-disabled
address) should be executed.
2. Rewriting the address array contents so that two or more ways are hit simultaneously is
prohibited. Operation is not guaranteed if the address array contents are changed so that two or
more ways are hit simultaneously.
3. Registers and memory-mapped cache can be accessed only by the CPU and not by the direct
memory access controller.