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Section 33 Power-Down Modes
Page 1774 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
33.2.2 Standby Control Register 2 (STBCR2)
STBCR2 is an 8-bit readable/writable register that controls the operation of modules.
Note: When writing to this register, see section 33.4, Usage Notes.
76543210
Bit:
Initial value:
R/W:
00000000
R/W R R/W R/W R R R R
MSTP
10
-
MSTP
8
MSTP
7
----
Bit Bit Name
Initial
Value R/W Description
7 MSTP10 0 R/W Module Stop 10
When the MSTP10 bit is set to 1, the clock supply to
the user debugging interface is halted.
0: The user debugging interface runs.
1: Clock supply to the user debugging interface halted.
6 0 R Reserved
This bit is always read as 0. The write value should
always be 0.
5 MSTP8 0 R/W Module Stop 8
When the MSTP8 bit is set to 1, the clock supply to the
direct memory access controller is halted.
0: The direct memory access controller runs.
1: Clock supply to the direct memory access controller
halted.