Section 32 General Purpose I/O Ports
Page 1762 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit Name Initial Value R/W Description
11 PJ11PR Pin state R The pin state is returned. These bits cannot be
modified.
Note: Bits 11 to 4 are reserved in the
SH7262 Group. These bits are always
read as 0. The write value should
always be 0.
10 PJ10PR Pin state R
9 PJ9PR Pin state R
8 PJ8PR Pin state R
7 PJ7PR Pin state R
6 PJ6PR Pin state R
5 PJ5PR Pin state R
4 PJ4PR Pin state R
3 PJ3PR Pin state R
2 PJ2PR Pin state R
1 PJ1PR Pin state R
0 PJ0PR Pin state R
32.2.34 Port K Control Register 0 to 2 (PKCR0 to PKCR2: Available Only in the SH7264
Group)
PKCR0 to PKCR2 are 16-bit readable/writable registers that are used to select the function of the
multiplexed pins on port K.
(1) Port K Control Register 2 (PKCR2)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
R R R/W R/W R R R/W R/W R R R/W R/W R R R/W R/W
---
PK10MD[1:0] PK9MD[1:0] PK8MD[1:0]PK11MD[1:0]
-- ---
Bit:
Initial value:
R/W:
Bit Bit Name Initial Value R/W Description
15, 14 All 0 R Reserved
These bits are always read as 0. The write
value should always be 0.
13, 12 PK11MD[1:0] 00 R/W PK11 Mode
Select the function of the PK11.
00: PK11
01: PWM2D
10: SSITxD0
11: Setting prohibited