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Section 33 Power-Down Modes
Page 1784 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
33.2.7 Standby Control Register 7 (STBCR7)
STBCR7 is an 8-bit readable/writable register that controls the operation of each module.
Note: When writing to this register, see section 33.4, Usage Notes.
76543210
Bit:
Initial value:
R/W:
111111 1
R/W R/W R R/W R R/W R/W
1
R
-
MSTP
77
MSTP
76
-
MSTP
72
MSTP
70
-
MSTP
74
Bit Bit Name
Initial
Value R/W Description
7 MSTP77 1 R/W Module Stop 77
When the MSTP77 bit is set to 1, the clock supply to
the serial I/O with FIFO is halted.
0: The serial I/O with FIFO runs.
1: Clock supply to the serial I/O with FIFO is halted.
6 MSTP76 1 R/W Module Stop 76
When the MSTP76 bit is set to 1, the clock supply to
the Renesas SPDIF interface is halted.
0: The Renesas SPDIF interface runs.
1: Clock supply to the Renesas SPDIF interface is
halted.
5 1 R Reserved
This bit is always read as 1. The write value should
always be 1.
4 MSTP74 1 R/W Module Stop 74
When the MSTP74 bit is set to 1, the clock supply to
the video display controller 3 is halted.
0: The video display controller 3 runs.
1: Clock supply to the video display controller 3 is
halted.