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Section 32 General Purpose I/O Ports
Page 1682 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
Table 32.7 Multiplexed Pins (Port F)
Setting
Register
Setting Mode Bit (PFnMD[2:0])
000 001 010 011 100 101 110
Function 1 Function 2 Function 3 Function 4 Function 5 Function 6
Function
7
PFCR3 PF12 BS AUDIO_XOUT* MISO0 TIOC3D SPDIF_OUT
PFCR2 PF11 A25 SSIDATA3 MOSI0 TIOC3C SPDIF_IN
PF10 A24 SSIWS3 SSL00 TIOC3B FCE
PF9 A23 SSISCK3 RSPCK0 TIOC3A FRB
PF8 CE2B SSIDATA3 DV_CLK SD_CD*
PFCR1 PF7 CE2A SSIWS3 DV_DATA7 TCLKD SD_WP*
PF6 CS6/CE1B SSISCK3 DV_DATA6 TCLKB SD_D1*
PF5 CS5/CE1A SSIDATA2 DV_DATA5 TCLKC SD_D0*
PF4 ICIOWR/AH SSIWS2 DV_DATA4 TxD3 SD_CLK*
PFCR0 PF3 ICIORD SSISCK2 DV_DATA3 RxD3 SD_CMD*
PF2 BACK SSIDATA1 DV_DATA2 TxD2 DACK0 SD_D3*
PF1 BREQ SSIWS1 DV_DATA1 RxD2 DREQ0 SD_D2*
PF0 WAIT SSISCK1 DV_DATA0 SCK2 TEND0