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Section 16 Renesas Serial Peripheral Interface
Page 796 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit Name
Initial
Value R/W Description
6
5
SPLW1
SPLW0
0
1
R/W
R/W
Access Width Specification
Specifies the width for accessing the data register
(SPDR). If the length of data transferred to SPDR
does not agree with these bit settings, operation is
not guaranteed.
00: Setting prohibited
01: SPDR is accessed in bytes.
10: SPDR is accessed in words.
1:1 SPDR is accessed in longwords.
4 to 0 All 0 R Reserved
The write value should always be 0. Otherwise,
operation cannot be guaranteed.