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Section 7 Interrupt Controller
R01UH0134EJ0400 Rev. 4.00 Page 181 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Interrupt Source
Interrupt Vector
Interrupt
Priority
(Initial Value)
Corresponding
IPR (Bit)
IPR
Setting
Unit
Internal
Priority
Default
PriorityVector
Vector Table
Address Offset
Direct
memory
access
controller
Channel
15
DEI15 168 H'000002A0 to
H'000002A3
0 to 15 (0) IPR09 (3 to 0) 1 High
HEI15 169 H'000002A4 to
H'000002A7
2
USB 2.0
host/
function
module
USBI 170 H'000002A8 to
H'000002AB
0 to 15 (0) IPR10 (15 to 12)
Video
display
controller
3
VIVSYNCJ 171 H'000002AC to
H'000002AF
0 to 15 (0) IPR10 (11 to 8) 1
VBUFERR 172 H'000002B0 to
H'000002B3
2
VIFIELDE 173 H'000002B4 to
H'000002B7
3
VOLINE 174 H'000002B8 to
H'000002BB
4
Compare
match
timer
Channel
0
CMI0 175 H'000002BC to
H'000002BF
0 to 15 (0) IPR10 (7 to 4)
Channel
1
CMI1 176 H'000002C0 to
H'000002C3
0 to 15 (0) IPR10 (3 to 0)
Bus state
controller
CMI 177 H'000002C4 to
H'000002C7
0 to 15 (0) IPR11 (15 to 12)
Watchdog
timer
ITI 178 H'000002C8 to
H'000002CB
0 to 15 (0) IPR11 (11 to 8)
Low