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Section 33 Power-Down Modes
R01UH0134EJ0400 Rev. 4.00 Page 1783 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit Name
Initial
Value R/W Description
3 MSTP63 1 R/W Module Stop 63
When the MSTP63 bit is set to 1, the clock supply to
the CD-ROM decoder is halted.
0: The CD-ROM decoder runs.
1: Clock supply to the CD-ROM decoder is halted.
2 MSTP62 1 R/W Module Stop 62
When the MSTP62 bit is set to 1, the clock supply to
channel 0 of the sampling rate converter is halted.
0: Channel 0 of the sampling rate converter runs.
1: Clock supply to channel 0 of the sampling rate
converter is halted.
1 MSTP61 1 R/W Module Stop 61
When the MSTP61 bit is set to 1, the clock supply to
channel 1 of the sampling rate converter is halted.
0: Channel 1 of the sampling rate converter runs.
1: Clock supply to channel 1 of the sampling rate
converter C is halted.
0 MSTP60 1 R/W Module Stop 60
When the MSTP60 bit is set to 1, the clock supply to
the USB 2.0 host/function module is halted.
0: The USB 2.0 host/function module runs.
1: Clock supply to the USB 2.0 host/function module
is halted.