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Section 16 Renesas Serial Peripheral Interface
Page 776 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
SSL control function
One SSL signal for each channel
In master mode, outputs SSL signal.
In slave mode, inputs SSL signal.
Controllable delay from SSL output assertion to RSPCK operation (RSPCK delay)
Range: 1 to 8 RSPCK cycles (set in RSPCK-cycle units)
Controllable delay from RSPCK stoppage to SSL output negation (SSL negation delay)
Range: 1 to 8 RSPCK cycles (set in RSPCK-cycle units)
Controllable wait for next-access SSL output assertion (next-access delay)
Range: 1 to 8 RSPCK cycles (set in RSPCK-cycle units)
Function for changing SSL polarity
Control in master transfer
A transfer of up to four commands can be executed sequentially in looped execution.
For each command, the following can be set:
SSL signal value, bit rate, RSPCK polarity/phase, transfer data length, LSB/MSB first, burst,
RSPCK delay, SSL negation delay, and next-access delay.
A transfer can be initiated by writing to the transmit buffer.
A transfer can be initiated by clearing the SPTEF bit.
MOSI signal value specifiable in SSL negation
Interrupt sources
Maskable interrupt sources:
Receive interrupt (receive buffer full)
Transmit interrupt (transmit buffer empty)
Error interrupt (mode fault, overrun)
Others
Provides loop back mode
Provides a function for disabling (initializing) this module