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Section 2 CPU
R01UH0134EJ0400 Rev. 4.00 Page 73 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Classification
Types
Operation
Code
Function
No. of
Instructions
Floating-point
instructions
19 FSCHG SZ bit inversion 48
FSQRT Floating-point square root
FSTS Floating-point store from system register FPUL
FSUB Floating-point subtraction
FTRC Floating-point conversion with rounding to
integer
FPU-related
CPU
instructions
2 LDS Load into floating-point system register 8
STS Store from floating-point system register
Bit
manipulation
10 BAND Bit AND 14
BCLR Bit clear
BLD Bit load
BOR Bit OR
BSET Bit set
BST Bit store
BXOR Bit exclusive OR
BANDNOT Bit NOT AND
BORNOT Bit NOT OR
BLDNOT Bit NOT load
Total: 112 253