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Section 26 USB 2.0 Host/Function Module
R01UH0134EJ0400 Rev. 4.00 Page 1355 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
26.3.3 System Configuration Status Register (SYSSTS)
SYSSTS is a register that monitors the line status (D + and D lines) of the USB data bus.
This register is initialized by a power-on reset or a USB bus reset.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit:
Initial value:
R/W:
00000 00000000
RRRRRRRRRRRRRRRR
Undefined
—————————— ————
Undefined*Undefined*
LNST[1:0]
Bit Bit Name Initial Value R/W Description
15 to 11 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.
10 Undefined R Reserved
The read value is undefined. The write value should
always be 0.
9 to 2 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.
1, 0 LNST[1:0] Undefined* R USB Data Line Status Monitor
Indicates the status of the USB data bus lines (D+
and D-) as shown in table 26.5.
These bits should be read after setting DPRPU to 1
to notify connection when the function controller
function is selected; whereas after setting DRPD to 1
to enable pulling down the lines when the host
controller function is selected.
Note: * Depends on the DP and DM pin status.