Filter
Top Products
Section 32 General Purpose I/O Ports
Page 1760 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
32.2.32 Port J Data Register 0 (PJDR0)
PJDR0 is a 16-bit readable/writable register that stores port J data. The PJ11DR to PJ0DR bits
correspond to the PJ11 to PJ0 pins, respectively.
When a pin function is general output, if a value is written to PJDR0, that value is output from the
pin, and if PJDR0 is read, the register value is returned directly regardless of the pin state.
When a pin function is general input, if PJDR0 is read, the pin state, not the register value, is
returned directly. If a value is written to PJDR0, although that value is written into PJDR0, it does
not affect the pin state. Table 32.20 summarizes PJDR0 read/write operation.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
---
PJ11
DR
PJ10
DR
PJ9
DR
PJ8
DR
PJ7
DR
PJ6
DR
PJ5
DR
PJ4
DR
PJ3
DR
PJ2
DR
PJ1
DR
PJ0
DR
-
Bit:
Initial value:
R/W:
Bit Bit Name Initial Value R/W Description
15 to 12 All 0 R Reserved
These bits are always read as 0. The write
value should always be 0.
11 PJ11DR 0 R/W See table 32.20
Note: Bits 11 to 4 are reserved in the
SH7262 Group. These bits are always
read as 0. The write value should
always be 0.
10 PJ10DR 0 R/W
9 PJ9DR 0 R/W
8 PJ8DR 0 R/W
7 PJ7DR 0 R/W
6 PJ6DR 0 R/W
5 PJ5DR 0 R/W
4 PJ4DR 0 R/W
3 PJ3DR 0 R/W
2 PJ2DR 0 R/W
1 PJ1DR 0 R/W
0 PJ0DR 0 R/W