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Section 15 Serial Communication Interface with FIFO
Page 750 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
15.4.2 Operation in Asynchronous Mode
In asynchronous mode, each transmitted or received character begins with a start bit and ends with
a stop bit. Serial communication is synchronized one character at a time.
The transmitting and receiving sections in this module are independent, so full duplex
communication is possible. The transmitter and receiver are 16-byte FIFO buffered, so data can be
written and read while transmitting and receiving are in progress, enabling continuous transmitting
and receiving.
Figure 15.2 shows the general format of asynchronous serial communication.
In asynchronous serial communication, the communication line is normally held in the mark
(high) state. This module monitors the line and starts serial communication when the line goes to
the space (low) state, indicating a start bit. One serial character consists of a start bit (low), data
(LSB first), parity bit (high or low), and stop bit (high), in that order.
When receiving in asynchronous mode, this module synchronizes at the falling edge of the start
bit. This module samples each data bit on the eighth or fourth pulse of a clock with a frequency 16
or 8 times the bit rate. Receive data is latched at the center of each bit.
0
1
D
0
D
1
D
3
D
4
D
5
D
6
D
2
0/1
11
1
D
7
(LSB) (MSB)
Start
bit
Idle state (mark state)
Stop bit
Transmit/receive data
Serial
data
Parity
bit
1 bit
1 or 2 bits
7 or 8 bits
1 bit
or
none
One unit of transfer data (character or frame)
Figure 15.2 Example of Data Format in Asynchronous Communication
(8-Bit Data with Parity and Two Stop Bits)