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Section 23 CD-ROM Decoder
R01UH0134EJ0400 Rev. 4.00 Page 1209 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
23.3.8 Sync Code Status Register (CROMST0)
The sync code status register (CROMST0) indicates various status information in sync code
maintenance modes
76543210
00000000
RRRRRRRR
Bit:
Initial value:
R/W:
--
ST_
SYIL
ST_
SYNO
ST_
BLKS
ST_
BLKL
ST_
SECS
ST_
SECL
Bit Bit Name
Initial
Value R/W Description
7, 6 All 0 R Reserved
These bits are always read as 0 and cannot be
modified.
5 ST_SYIL 0 R Indicates that a sync code was detected at a position
where the value in the word counter (used to measure
intervals between sync codes) was not correct, but the
sync code was ignored and not taken into account in
synchronization.
This bit is only valid in automatic sync maintenance
mode and interpolated sync mode.
4 ST_SYNO 0 R Indicates that a sync code has not been detected
despite the word counter having reached the final value,
and synchronization has been continued with the aid of
an interpolated sync code.
This bit is only valid in automatic sync maintenance
mode and interpolated sync mode.
3 ST_BLKS 0 R Indicates that a sync code was detected at a position
where the value in the word counter was not correct,
and the sync code was used in synchronization.
This bit is only valid in automatic sync maintenance
mode and external sync mode.
2 ST_BLKL 0 R Indicates that a sync code has not been detected
despite the word counter having reached the final value,
and the period of the sector has been prolonged.
This bit is only valid in external sync mode.