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Section 19 Serial I/O with FIFO
Page 978 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
(3) 16-bit Monaural Data
Falling edge sampling, slot No.0 used for transmit and receive data, and frame length = 64 bits
SIOFSCK
SIOFRxD
SIOFTxD
SIOFSYNC
L-channel data
TRMD[1:0]=00 or 10,
TDLE=1,
RDLE=1,
REDG=0,
TDLA[3:0]=0000,
RDLA[3:0]=0000,
FL[3:0]=1101 (frame length: 64 bits)
TDRE=0,
RDRE=0,
TDRA[3:0]=0000,
RDRA[3:0]=0000
Slot No.0 Slot No.1 Slot No.2 Slot No.3
Specifications:
1 frame
1-bit delay
Figure 19.12 Transmit and Receive Timing (16-Bit Monaural Data)
(4) 16-bit Stereo Data (1)
Falling edge sampling, slot No.0 used for left channel data, slot No.1 used for right channel data,
and frame length = 128 bits
SIOFSCK
SIOFRxD
SIOFTxD
SIOFSYNC
TRMD[1:0]=00 or 10,
TDLE=1,
RDLE=1,
REDG=0,
TDLA[3:0]=0000,
RDLA[3:0]=0000,
FL[3:0]=1110 (frame length: 128 bits),
TDRE=1,
RDRE=1,
TDRA[3:0]=0001,
RDRA[3:0]=0001
L-channel
data
Slot No.0 Slot No.1 Slot No.2 Slot No.3 Slot No.4 Slot No.5 Slot No.6 Slot No.7
Specifications:
1 frame
1 bit delay
R-channel
data
Figure 19.13 Transmit and Receive Timing (16-Bit Stereo Data (1))