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Section 24 A/D Converter
Page 1278 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
Table 24.4 A/D Conversion Time (Single Mode)
CKS2 = 0 CKS2 = 1
CKS1 = 0 CKS1 = 1 CKS1 = 0
CKS0 = 0 CKS0 = 1 CKS0 = 0 CKS0 = 1 CKS0 = 0 CKS0 = 1
Item Symbol Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
A/D
conversion
start delay
time
t
D
12 — 18 22 — 28 24 — 30 26 — 32 28 — 34 38 — 52
Input
sampling
time
t
SPL
— 50 — — 66 — — 74 — — 82 — — 98 — — 130 —
A/D
conversion
time
t
CONV
206 — 212 270 — 276 300 — 304 330 — 340 392 — 404 534 — 548
Note: Values in the table are represented in terms of t
cyc
(CKIO clock output cycle time).
Table 24.5 A/D Conversion Time (Multi Mode and Scan Mode)
CKS2 CKS1 CKS0 Conversion Time (t
cyc
)
0 0 0 192 (constant)
1 256 (constant)
1 0 288 (constant)
1 320 (constant)
1 0 0 384 (constant)
1 512 (constant)
Note: Values in the table are represented in terms of t
cyc
(CKIO clock output cycle time).