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Section 27 Video Display Controller 3
Page 1604 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
27.7.24 Control Area Start Position Registers (GROPEDPHV1 and GROPEDPHV2)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
151413121110987654321
0
0000000000000000
RRRRRRR/WR/WR/WR/WR/WR/WR/WR/WR/WR/W
0000000000000000
RRRRRRR/WR/WR/WR/WR/WR/WR/WR/WR/WR/W
------
-
GROPEDPV[9:0]
- - - - - GROPEDPH[9:0]
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bit Bit Name
Initial
Value R/W Description
31 to 26 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.
25 to 16 GROPEDPV
[9:0]
H'000 R/W These bits specify the vertical start position of the
control area in number of lines.
15 to 10 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.
9 to 0 GROPEDPH
[9:0]
H'000 R/W These bits specify the horizontal start position of
the control area in number of pixels.