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Section 19 Serial I/O with FIFO
R01UH0134EJ0400 Rev. 4.00 Page 963 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
19.4 Operation
19.4.1 Serial Clocks
(1) Master/Slave Modes
The following two modes are available as a clock mode for this module.
Slave mode: SIOFSCK, SIOFSYNC input
Master mode: SIOFSCK, SIOFSYNC output
(2) Baud Rate Generator: In master mode, the baud rate generator (BRG) is used to
generate the serial clock. The division ratio is from 1/2 to 1/1024.
Figure 19.2 shows connections for supply of the serial clock.
BRG
MCLK
1/2 to 1/1024MCLK
Timing
control
SCKE
Master
SIOFSCK
AUDIO_CLK
AUDIO_X1
Figure 19.2 Serial Clock Supply
Table 19.3 shows an example of serial clock frequency.
Table 19.3 Serial Clock Frequency
Frame Length
Sampling Rate
8 kHz 44.1 kHz 48 kHz
32 bits 256 kHz 1.4112 MHz 1.536 MHz
64 bits 512 kHz 2.8224 MHz 3.072 MHz
128 bits 1.024 MHz 5.6448 MHz 6.144 MHz
256 bits 2.048 MHz 11.289 MHz 12.289 MHz