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Section 4 Boot Mode
Page 114 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
4.4 Notes
4.4.1 Boot Related Pins
The initial states and output states in deep standby mode of the pins related to CS0 space memory
read, NAND flash memory controller, and channel 0 of the Renesas serial peripheral interface are
different in each boot mode.
For details, refer to section 9, Bus State Controller, section 32, General Purpose I/O Ports, and
section 33, Power-Down Modes.