Section 7 Interrupt Controller
Page 176 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
7.4.5 On-Chip Peripheral Module Interrupts
On-chip peripheral module interrupts are generated by the following on-chip peripheral modules:
Direct memory access controller
USB 2.0 host/function module
Video display controller 3
Compare match timer
Bus state controller
Watchdog timer
Multi-function timer pulse unit 2
Motor control PWM timer
A/D converter
Serial sound interface
Renesas SPDIF interface
I
2
C bus interface 3
Serial communication interface with FIFO
Serial I/O with FIFO
Renesas serial peripheral interface
Controller area network
IEBus
TM
controller
CD-ROM decoder
NAND flash memory controller
SD host interface
Realtime clock
Sampling rate converter
Decompression unit
As every source is assigned a different interrupt vector, the source does not need to be identified in
the exception service routine. A priority level in a range from 0 to 15 can be set for each module
by interrupt priority registers 05 to 22 (IPR05 to IPR22). The on-chip peripheral module interrupt
exception handling sets the I3 to I0 bits in SR to the priority level of the accepted on-chip
peripheral module interrupt.