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Section 26 USB 2.0 Host/Function Module
Page 1384 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
26.3.12 BRDY Interrupt Enable Register (BRDYENB)
BRDYENB is a register that enables or disables the BRDY bit in INTSTS0 to be set to 1 when the
BRDY interrupt is detected for each pipe.
On detecting the BRDY interrupt for the pipe corresponding to the bit in this register that has been
set to 1, this module sets 1 to the corresponding PIPEBRDY bit in BRDYSTS and the BRDY bit
in INTSTS0, and generates the BRDY interrupt.
While at least one PIPEBRDY bit in BRDYSTS indicates 1, this module generates the BRDY
interrupt when the corresponding interrupt enable bit in BRDYENB is modified from 0 to 1.
This register is initialized by a power-on reset.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit:
Initial value:
R/W:
0000000000000000
R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
——————
PIPE9
BRDYE
PIPE8
BRDYE
PIPE7
BRDYE
PIPE6
BRDYE
PIPE5
BRDYE
PIPE4
BRDYE
PIPE3
BRDYE
PIPE2
BRDYE
PIPE1
BRDYE
PIPE0
BRDYE
Bit Bit Name
Initial
Value
R/W Description
15 to 10 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.
9 PIPE9BRDYE 0 R/W BRDY interrupt Enable for PIPE9
0: Interrupt output disabled
1: Interrupt output enabled
8 PIPE8BRDYE 0 R/W BRDY interrupt Enable for PIPE8
0: Interrupt output disabled
1: Interrupt output enabled
7 PIPE7BRDYE 0 R/W BRDY interrupt Enable for PIPE7
0: Interrupt output disabled
1: Interrupt output enabled
6 PIPE6BRDYE 0 R/W BRDY interrupt Enable for PIPE6
0: Interrupt output disabled
1: Interrupt output enabled