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Section 32 General Purpose I/O Ports
Page 1728 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
32.2.20 Port F Control Register 0 to 3 (PFCR0 to PFCR3)
PFCR0 to PFCR3 are 16-bit readable/writable registers that are used to select the functions of the
multiplexed pins on port F.
(1) Port F Control Register 3 (PFCR3)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
R R R R R R R R R R R R R R/W R/W R/W
------------
PF12MD[2:0]
-
Bit:
Initial value:
R/W:
Bit Bit Name Initial Value R/W Description
15 to 3 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.
2 to 0 PF12MD[2:0] 000 R/W PE12 Mode
Select the function of the PE12.
000: PE12
001: BS
010: AUDIO_XOUT
(640-Kbyte version only)
011: MISO0
100: TIOC3D
101: SPDIF_OUT
110: Setting prohibited
111: Setting prohibited
(2) Port F Control Register 2 (PFCR2)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W R R/W R/W R/W
-
PF10MD[2:0] PF9MD[2:0] PF8MD[2:0]PF11MD[2:0]
---
Bit:
Initial value:
R/W:
Bit Bit Name Initial Value R/W Description
15 0 R Reserved
This bit is always read as 0. The write value should
always be 0.