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R01UH0134EJ0400 Rev. 4.00 Page 2069 of 2108
Sep 24, 2014
Item Page Revision (See Manual for Details)
10.4.4 DMA Transfer Types
(3) Relationship between
Request Modes and Bus
Modes by DMA Transfer
Category
Table 10.9 Relationship of
Request Modes and Bus
Modes by DMA Transfer
Category
424 Table amended
Address
Mode Transfer Category
Request
Mode
Bus
Mode
Transfer
Size (Bits)
Usable
Channels
Dual External device with DACK and external
memory
External B/C 8/16/32/128 0, 1*
6
External device with DACK and memory-
mapped external device
External B/C 8/16/32/128 0, 1*
6
External device with DACK and on-chip
peripheral module
External B/C 8/16/32/128*
2
0, 1*
6
External device with DACK and on-chip
memory
External B/C 8/16/32/128*
2
0, 1*
6
11.1 Features 431 Description amended
...
Buffer operation settable for channels 0, 3, and 4
Phase counting mode settable independently for each
of channels 1 and 2
Cascade connection operation
Fast access via internal 16-bit bus
25 interrupt sources
11.3.16 Timer Output
Master Enable Register
(TOER)
486 Description added
TOER is an 8-bit readable/writable register that
enables/disables output settings for output pins TIOC4D,
TIOC4C, TIOC3D, TIOC4B, TIOC4A, and TIOC3B. These
pins do not output correctly if the TOER bits have not been
set. Set TOER of CH3 and CH4 prior to setting TIOR of
CH3 and CH4. Set TOER when count operation of TCNT
channels 3 and 4 is halted.
11.3.17 Timer Output
Control Register 1 (TOCR1)
489 Table amended and note added
Bit Bit Name
Initial
value
R/W Description
1 OLSN 0 R/W Output Level Select N*
2
*
4
This bit selects the reverse phase output level in reset-
synchronized PWM mode/complementary PWM mode.
See table 11.28.
Notes: ...
4. If there is no dead time, the reverse phase output is the inversion of the forward phase.
Set OLSP and OLSN to the same value.
11.3.18 Timer Output
Control Register 2 (TOCR2)
492 Table note amended
Note: * Setting the TOCS bit in TOCR1 to 1 makes this
bit setting valid. If there is no dead time, the
reverse phase output is the inversion of the
forward phase. Set OLSiP and OLSiN to the
same value (i = 1, 2, or 3).