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Section 34 User Debugging Interface
R01UH0134EJ0400 Rev. 4.00 Page 1827 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
34.5 Usage Notes
1. Once a command of this module has been set, it will not be modified until another command is
not set again. If the same command is to be set continuously, the command must be set after a
command (BYPASS mode, etc.) that does not affect chip operations is once set.
2. In software standby mode and in this module's standby state, none of the functions of this
module can be used. To retain the TAP status before and after standby mode, keep TCK high
before entering standby mode.
3. Regardless of whether this module is used, make sure to keep the TRST pin low to initialize
this module at power-on or in recovery from deep standby by the RES pin assertion.
4. If the TRST pin is asserted immediately after the setting of the TDO transition timing
switching command and the negation of the RES pin, the TDO transition timing switching
command is cleared. To avoid this case, make sure to put 20 tcyc or longer between the signal
transition timing of the RES and TRST pins. For details, see section 34.4.3, TDO Output
Timing.
5. When starting the TAP controller after the negation of the TRST pin, make sure to allow 200
ns or longer after the negation.
6. Please keep TMS pin high for 200 ns from TRST pin negation.