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Section 16 Renesas Serial Peripheral Interface
Page 790 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Bit:
Initial value:
R/W:
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
SPD31 SPD30 SPD29 SPD28 SPD27 SPD26 SPD25 SPD24 SPD23 SPD22 SPD21 SPD20 SPD19 SPD18 SPD17 SPD16
1514131211109876543210
Bit:
Initial value:
R/W:
Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
SPD15 SPD14 SPD13 SPD12 SPD11 SPD10 SPD9 SPD8 SPD7 SPD6 SPD5 SPD4 SPD3 SPD2 SPD1 SPD0
16.3.6 Sequence Control Register (SPSCR)
SPSCR sets the sequence controlled method when this module operates in master mode. If the
contents of SPSCR are changed while the MSTR and SPE bits in the control register (SPCR) are 1
with the function of this module enabled in master mode, the subsequent operation cannot be
guaranteed.
76543210
Bit:
Initial value:
R/W:
00000000
R R R R R R R/W R/W
⎯⎯⎯⎯⎯⎯
SPS
LN1
SPS
LN0
Bit Bit Name
Initial
Value
R/W Description
7 to 2 All 0 R Reserved
The write value should always be 0. Otherwise,
operation cannot be guaranteed.