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Section 13 Watchdog Timer
Page 662 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
Figure 13.1 shows a block diagram.
WDTOVF
WTCSR
WTCNT
WRCSR
Watchdog timer
Standby
control
Bus interface
Divider
Clock selector
Clock
Standby
mode
Peripheral
clock
Standby
cancellation
Reset
control
Clock selection
Overflow
Internal reset
request*
Interrupt
control
Interrupt
request
[Legend]
WTCSR:
WTCNT:
WRCSR:
Watchdog timer control/status register
Watchdog timer counter
Watchdog reset control/status register
Note: * The internal reset signal can be generated by making a register setting.
Figure 13.1 Block Diagram
13.2 Input/Output Pin
Table 13.1 shows the pin configuration.
Table 13.1 Pin Configuration
Pin Name Symbol I/O Function
Watchdog timer overflow WDTOVF Output Outputs the counter overflow signal in
watchdog timer mode