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Section 36 List of Registers
Page 1864 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
Module Name Register Name Abbreviation
Number
of Bits Address
Access
Size
Controller area
network
Data Frame Receive Pending Register 0_1 RXPR0_1 16 H'FFFE5842 16
Remote Frame Receive Pending Register
1_1
RFPR1_1 16 H'FFFE5848 16
Remote Frame Receive Pending Register
0_1
RFPR0_1 16 H'FFFE584A 16
Mailbox Interrupt Mask
Register 1_1
MBIMR1_1 16 H'FFFE5850 16
Mailbox Interrupt Mask
Register 0_1
MBIMR0_1 16 H'FFFE5852 16
Unread Message Status
Register 1_1
UMSR1_1 16 H'FFFE5858 16
Unread Message Status
Register 0_1
UMSR0_1 16 H'FFFE585A 16
Timer Trigger Control Register 0_1 TTCR0_1 16 H'FFFE5880 16
Cycle Maximum/Tx-Enable Window
Register_1
CMAX_TEW_1 16 H'FFFE5884 16
Reference Trigger Offset Register_1 RFTROFF_1 16 H'FFFE5886 16
Timer Status Register_1 TSR_1 16 H'FFFE5888 16
Cycle Counter Register_1 CCR_1 16 H'FFFE588A 16
Timer Counter Register_1 TCNTR_1 16 H'FFFE588C 16
Cycle Time Register_1 CYCTR_1 16 H'FFFE5890 16
Reference Mark Register_1 RFMK_1 16 H'FFFE5894 16
Timer Compare Match Register 0_1 TCMR0_1 16 H'FFFE5898 16
Timer Compare Match Register 1_1 TCMR1_1 16 H'FFFE589C 16
Timer Compare Match Register 2_1 TCMR2_1 16 H'FFFE58A0 16
Tx-Trigger Time Selection Register_1 TTTSEL_1 16 H'FFFE58A4 16
Mailbox n Control 0_H_1
(n = 0 to 31)
MBn_
CONTROL0_H_1
(n = 0 to 31)
16 H'FFFE5900
+ n × 32
16, 32
Mailbox n Control 0_L_1
(n = 0 to 31)
MBn_
CONTROL0_L_1
(n = 0 to 31)
16 H'FFFE5902
+ n × 32
16
Mailbox n Local Acceptance Filter Mask
0_1 (n = 0 to 31)
MBn_LAFM0_1
(n = 0 to 31)
16 H'FFFE5904
+ n × 32
16, 32