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Section 20 Controller Area Network
R01UH0134EJ0400 Rev. 4.00 Page 1009 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit 0 — Reset Request (MCR0): Controls resetting of this module. When this bit is changed
from '0' to '1' this module controller enters its reset routine, re-initialising the internal logic, which
then sets GSR3 and IRR0 to notify the reset mode. During a re-initialisation, all user registers are
initialised.
This module can be re-configured while this bit is set. This bit has to be cleared by writing a '0' to
join the CAN bus. After this bit is cleared, this module waits until it detects 11 recessive bits, and
then joins the CAN bus. The Baud Rate needs to be set up to a proper value in order to sample the
value on the CAN Bus.
After Power On Reset, this bit and GSR3 are always set. This means that a reset request has been
made and this module needs to be configured.
The Reset Request is equivalent to a Power On Reset but controlled by Software.
Bit 0: MCR0 Description
0 Clear Reset Request
1 CAN Interface reset mode transition request (Initial value)
(2) General Status Register (GSR)
The General Status Register (GSR) is a 16-bit read-only register that indicates the status of this
module.
GSR (Address = H'002)
1514131211109876543210
0000000000001100
RRRRRRRRRRRRRRRR
GSR5 GSR4 GSR3 GSR2 GSR1 GSR0
Bit:
Initial value:
R/W:
----------
Bits 15 to 6: Reserved. The written value should always be '0' and the returned value is '0'.
Bit 5 — Error Passive Status Bit (GSR5): Indicates whether the CAN Interface is in Error
Passive or not. This bit will be set high as soon as this module enters the Error Passive state and is
cleared when the module enters again the Error Active state (this means the GSR5 will stay high
during Error Passive and during Bus Off). Consequently to find out the correct state both GSR5
and GSR0 must be considered.