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Section 28 Sampling Rate Converter
Page 1642 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
The data in SRCOD is aligned differently depending on the OCH and OED bit setting in
SRCODCTRL. Tables 28.5 and 28.6 show the correspondence between the OCH and OED bit
setting and data alignment in SRCOD.
Table 28.5 Alignment of Data in SRCOD_0
OCH OED SRCOD_0[31:24] SRCOD_0[23:16] SRCOD_0[15:8] SRCOD_0[7:0]
0 0 Lch[15:8] Lch[7:0] Rch[15:8]*
2
Rch[7:0]*
2
1 Lch[7:0] Lch[15:8] Rch[7:0]*
2
Rch[15:8]*
2
1*
1
0 Rch[15:8] Rch[7:0] Lch[15:8] Lch[7:0]
1 Rch[7:0] Rch[15:8] Lch[7:0] Lch[15:8]
Notes: 1. When processing monaural data, do not set the bit to 1.
2. When processing monaural data, the data in these bits is invalid.
Table 28.6 Alignment of Data in SRCOD_1
IED SRCOD_1[31:24] SRCOD_1[23:16]
0 Upper byte Lower byte
1 Lower byte Upper byte