Renesas R5S72643 Doll User Manual


  Open as PDF
of 2152
 
Section 26 USB 2.0 Host/Function Module
R01UH0134EJ0400 Rev. 4.00 Page 1457 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Bit Bit Name
Initial
Value R/W Description
13 CSCLR 0 R/W* C-SPLIT Status Clear Bit
Setting this bit to 1 allows this module to clear the
CSSTS bit of the pertinent pipe to 0.
0: Writing invalid
1: Clears the CSSTS bit to 0.
For the transfer using the split transaction, to restart
the next transfer with the S-SPLIT forcibly, set this bit
to 1. However, for the normal split transaction, this
module automatically clears the CSSTS bit to 0 upon
completion of the C-SPLIT; therefore, clearing the
CSSTS bit is not necessary.
Controlling the CSSTS bit through this bit must be
done while UACT is 0 thus communication is halted
or while no transfer is being performed with bus
disconnection detected.
Setting this bit to 1 while CSSTS is 0 has no effect.
When the function controller function is selected, be
sure to write 0 to this bit.
12 CSSTS 0 R/W CSSTS Status Bit
Indicates the C-SPLIT status of the split transaction
when the host controller function is selected.
0: START-SPLIT (S-SPLIT) transaction being
processed or the transfer not using the split
transaction in progress
1: C-SPLIT transaction being processed
This module sets this bit to 1 upon start of the C-
SPLIT and clears this bit to 0 upon detection of C-
SPLIT completion.
Indicates the valid value only when the host
controller function is selected.
11, 10 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.