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Section 27 Video Display Controller 3
R01UH0134EJ0400 Rev. 4.00 Page 1591 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
27.7.14 Video Display and Recording Size Register (VIDEO_DISP_SIZE)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
151413121110987654321
0
0000000011110000
R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W
0000000101101000
R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
------
-
- VIDEO_DISP_HEIGHT [8:0]
- - - - - VIDEO_DISP_WIDTH [9:0]
Bit:
Initial value:
R/W:
Bit:
Initial value:
R/W:
Bit Bit Name
Initial
Value
R/W Description
31 to 25 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.
24 to 16 VIDEO_DISP_
HEIGHT [8:0]
H'0F0 R/W These bits specify in number of lines the vertical
size of the video data to be read in the video
display mode.
In the video recording mode, set to 240 lines for
NTSC or 288 lines for PAL.
15 to 10 All 0 R Reserved
These bits are always read as 0. The write value
should always be 0.
9 to 0 VIDEO_DISP_
WIDTH [9:0]
H'168 R/W These bits specify in number of pixels the
horizontal size of the video data to be read in the
video display mode.*
The lowest bit should always be 0.
Note: * Set the setting values of the VIDEO_DISP_WIDTH field to number of vertical pixels in
captured video or less. The underflow flag is set to 1 when the setting values are more
than number of vertical pixels.