Renesas R5S72643 Doll User Manual


  Open as PDF
of 2152
 
Section 23 CD-ROM Decoder
Page 1254 of 2108 R01UH0134EJ0400 Rev. 4.00
Sep 24, 2014
SH7262 Group, SH7264 Group
23.5 Interrupt Sources
23.5.1 Interrupt and DMA Transfer Request Signals
Table 23.3 lists the interrupt signals and DMA transfer request signal generated by the CD-ROM
decoder, along with the meanings and the modules to which the signals are connected.
Table 23.3 Interrupt and DMA Transfer Request Signals
Name Condition Connected To
ISEC Transitions from sector to sector Interrupt controller
ITARG Access to a CD-ROM sector that is not the expected target
sector
Interrupt controller
ISY A sync code from the CD-ROM with abnormal timing Interrupt controller
IERR An error that was not correctable by ECC correction or an
error indicated by EDC checking after ECC correction
Interrupt controller
IBUF State changes in data transfer to the buffer Interrupt controller
IREADY Request for data transfer to the buffer for CD-ROM Interrupt controller
DMA transfer
request
Request for data transfer to the buffer for CD-ROM Direct memory
access controller
(1) ISEC Interrupt
This interrupt is generated when the sync code indicates a transition from sector to sector.
(2) ITARG Interrupt
This interrupt is generated when the stream data transferred from the CD-DSP is not the data of
the target sector. The CD-ROM decoder checks the time data in the subcode. In correct operation,
data transfer is expected to start slightly before the target sector. An ITARG interrupt is generated
in the following cases.
When data of a sector preceding the target sector by quite a few sectors have been transferred
When data of a sector that comes after the target sector have been transferred
For the generation of this interrupt, ITARG is detected from the subcode. However, this interrupt
has no meaning in this LSI because CD-ROM data are transferred from the serial sound interface.