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Section 7 Interrupt Controller
R01UH0134EJ0400 Rev. 4.00 Page 203 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Figure 7.12 shows the timing for saving to a register bank. Saving to a register bank takes place
between the start of interrupt exception handling and the start of fetching the first instruction in the
interrupt exception service routine.
F
2 Icyc + 3 Bcyc + 1 Pcyc 3 Icyc m1 m2 m3
3 Icyc + m1 + m2
IRQ
(1) VTO, PR, GBR, MACL
(2) R12, R13, R14, MACH
(3) R8, R9, R10, R11
(4) R4, R5, R6, R7
(5) R0, R1, R2, R3
Overrun fetch
Saved to bank
DEEMMM
E
F
FD
E
[Legend]
m1:
m2:
m3:
Vector address read
Saving of SR (stack)
Saving of PC (stack)
First instruction in interrupt exception
service routine
Instruction (instruction replacing
interrupt exception handling)
Figure 7.12 Bank Save Timing
(2) Restoration from Bank
The RESBANK (restore from register bank) instruction is used to restore data saved in a register
bank. After restoring data from the register banks with the RESBANK instruction at the end of the
interrupt exception service routine, execute the RTE instruction to return from interrupt exception
service routine.