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Section 5 Clock Pulse Generator
R01UH0134EJ0400 Rev. 4.00 Page 121 of 2108
Sep 24, 2014
SH7262 Group, SH7264 Group
Table 5.3 Relationship between Clock Operating Mode and Frequency Range
Clock
Operating
Mode
FRQCR
Setting*
1
PLL
Frequency
Multiplier
Ratio of
Internal
Clock
Frequencies
(I:B:P)*
2
Selectable Frequency Range (MHz)
PLL
Circuit
Input Clock*
3
Output Clock
(CKIO Pin)
CPU Clock
(I)
Bus Clock
(B)
Peripheral
Clock (P)
0 H'x104 ON ( 12) 12:4:2 10 to 12 40 to 48 120 to 144 40 to 48 20 to 24
H'x106 ON ( 12) 12:4:1 10 to 12 40 to 48 120 to 144 40 to 48 10 to 12
H'x124 ON ( 12) 4:4:2 10 to 12 40 to 48 40 to 48 40 to 48 20 to 24
H'x126 ON ( 12) 4:4:1 10 to 12 40 to 48 40 to 48 40 to 48 10 to 12
1 H'x104 ON ( 12) 3:1:1/2 48 48 144 48 24
H'x106 ON ( 12) 3:1:1/4 48 48 144 48 12
H'x124 ON ( 12) 1:1:1/2 48 48 48 48 24
H'x126 ON ( 12) 1:1:1/4 48 48 48 48 12
2 H'x003 ON ( 8) 8:4:2 10 to 18 40 to 72 80 to 144 40 to 72 20 to 36
H'x004 ON ( 8) 8:4:4/3 10 to 18 40 to 72 80 to 144 40 to 72 13.33 to 24
H'x005 ON ( 8) 8:4:1 10 to 18 40 to 72 80 to 144 40 to 72 10 to 18
H'x006 ON ( 8) 8:4:2/3 10 to 18 40 to 72 80 to 144 40 to 72 6.67 to 12
H'x013 ON ( 8) 4:4:2 10 to 18 40 to 72 40 to 72 40 to 72 20 to 36
H'x014 ON ( 8) 4:4:4/3 10 to 18 40 to 72 40 to 72 40 to 72 13.33 to 24
H'x015 ON ( 8) 4:4:1 10 to 18 40 to 72 40 to 72 40 to 72 10 to 18
H'x016 ON ( 8) 4:4:2/3 10 to 18 40 to 72 40 to 72 40 to 72 6.67 to 12
3 H'x003 ON ( 8) 8/3:4/3:2/3 48 64 128 64 32
H'x004 ON ( 8) 8/3:4/3:4/9 48 64 128 64 21.33
H'x005 ON ( 8) 8/3:4/3:1/3 48 64 128 64 16
H'x006 ON ( 8) 8/3:4/3:2/9 48 64 128 64 10.67
H'x013 ON ( 8) 4/3:4/3:2/3 48 64 64 64 32
H'x014 ON ( 8) 4/3:4/3:4/9 48 64 64 64 21.33
H'x015 ON ( 8) 4/3:4/3:1/3 48 64 64 64 16
H'x016 ON ( 8) 4/3:4/3:2/9 48 64 64 64 10.67
Notes: 1. x in the FRQCR register setting depends on the set value in bits 12, 13, and 14.
2. The ratio of clock frequencies, where the input clock frequency is assumed to be 1.
3. In modes 0 and 2, the frequency of the EXTAL pin input clock or the crystal resonator
In modes 1 and 3, the frequency of the USB_X1 pin input clock or the crystal
resonator
Caution: Do not use this LSI for frequency settings other than those in table 5.3.