Filter
Top Products
ARCHITECTURE
AND
INSTRUCTIONS
or DX). The flags are undefined. Division by
zero generates an interrupt of type
O.
IDIV (integer division)
is
similar to DIV
except that it performs a signed division.
AAD
(unpacked
BCD
[ASCII] adjust for
divi-
sion) performs a correction of the dividend
in
AL before dividing two unpacked decimal
operands, so that the tesult
will
yield an un-
packed decimal quotient.
CBW (convert byte to word) performs a sign
extension of AL into
AR
CWD (convert word to double word)
per-:-
forms a sign extension of AX into DX.
LOGIC
INSTRUCTIONS
The
8088
provides the basic logic operation
for both
8-
and 16-bit operands.
Single-Operand Operations
Three single-operand logical operations are
provided:
NOT forms the ones complement of the
source operand and returns the result to the
operand. Flags are not affected.
Shift operations of four varieties are pro-
vided for memory and register operands,
SHL
(shift logic left),
SHR
(shift logic right),
SAL (shift arithmetic left), and
SAR
(shift
arithmetic right). Single bit shifts, and
vari-
able bit shifts with the shift count taken from
the
CL
register are available. The
CF
flag
becomes the last bit shifted out;
OF
is
defined
only for shifts with count
of
1,
and set if the
final sign bit value differs from the previous
value of the sign bit; and PF,
SF, and
ZF
are
set to reflect the result value.
Rotate operations of four varieties are
pro-
vided for memory and register operands,
ROL
(rotate left),
ROR
(rotate right),
RCL
(rotate through
CF
left), and
RCR
(rotate
through
CF
right). Single bit rotates, and vari-
able bit rotates with the rotate count taken
from the
CL
register are available. The
CF
flag becomes the last bit rotated out;
OF
is
defined only for shifts with count of
1,
and
is
2-13
set if the final sign bit value differs
from
the
previous value of the sign bit.
Two-Operand Operations
Four
two-operand logical operations are
provided. The
CF
and
OF
flags are cleared
on
all operations; SF, PF, and
ZF
reflect the
result.
AND
performs the bitwise logical conjunc-
tion
of the two source operands and returns
the result to one of the operands. .
TEST performs the same operations as
AND
causing the flags to
be
affected
but
does not
return the result.
OR
performs the bitwise logical inclusive dis-
junction
of
the two source operands
and
returns the result to one of the operands.
XOR performs the bitwise logical exclusive
disjunction of the two source operands and
returns the result to one of the operands.
STRING
MANIPULATION
INSTRUCTIONS
One-byte instructions perform various primi-
tive operations for the manipulation of byte
and word strings (sequences
of
bytes or
words). Any primitive operation can be
per-
formed repeatedly in hardware by preceding
its instruction with a repeat prefix. The
single-operation forms may be combined to
form complex stting operations with
repeti-
tion provided by iteration operations.
Hardware' Operation Control
All primitive string operations use the SI reg-
ister to address the source operands, which
are assumed to be in the current
data
seg-
ment. The
DI
register addresses the desti-
nation operands, which reside in the current
extra segment.
If
the
DF
flag
is
cleared, the
operand pointers are incremented after each
operation (once for byte operations and twice
for word operations).
If
the
DF
flag
is
set, the
operand pointers are decremented after each
operation.
See Processor' Control for setting
and clearing DF.