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iAPX 88/10
A.C.
CHARACTERISTICS (Continued)
TIMING RESPONSES
8088
Symbol Parameter
Min.
TCLAV AddressValid Delay 10
TCLAX Address
Hold Time
10
TCLAZ
Address
Float Delay
TCLAX
TLHLL ALE Width
TCLCH-20
TCLLH ALE Active Delay
TCHLL
ALE
Inactive Dell\Y
TLLAX
Address
Hold Time to
TCHCL-10
ALE Inactive
TCLDV
Data Valid Delay 10
TCHDX Data
Hold Time 10
TWHDX Data
Hold Time AfterWR
TCLCH-30
TCVCTV Control Active Delay 1 10
TCHCTV Control Active Delay 2 10
TCVCTX Control Inactive Delay
10
TAZRL
Address Float to
READ
0
Active
TCLRL
RD
Active Delay 10
TCLRH
RD
Inactive Delay 10
TRHAV
RD
Inactive to Next
TCLCL-45
Address Active
TCLHAV HLDAValid Delay 10
TRLRH RDWidth
2TCLCL-75
TWLWH
WRWidth
2TCLCL-60
TAVAL
Address Valid
to
ALE Low
TCLCH-60
TOLOH Output RiseTime
TOHOL
Output Fall
Time
A.C.
TESTIN~
INPUT, OUTPUT WAVEFORM
INPUT/OUTPUT
A.C TESTING: INPUTS ARE DRIVEN
AT
2.4V FOR A LOGIC
"1"
AND 0 45V FOR
A LOGIC '0." THE CLOCK
IS
DRIVEN
AT
4.3V AND 0
2SV.
TIMING MEASURE-
MENTS ARE MADE
AT
1.5V FOR BOTH A LOGIC
1"
AND 0
'"
8088·2
Max.
Min. Max. Units Test Conditions
110 10 60
ns
10
ns
BO
TCLAX
50
ns
TCLCH-10
ns
BO
50
ns
B5
55
ns
TCHCL-10
ns
110
10
60
ns
CL
= 20-100 pF for
10
ns
all
BOBB
Outputs
in addition to
TCLCH-30
ns
internal
loads
110
10
70
ns
110
10
60
ns
110
10
70
ns
0
ns
165
10
100 ns
150
10
BO
ns
TCLCL-40
ns
160
10 100 ns
2TCLCL-50
ns
2TCLCL-40
ns
TCLCH-40
ns
20 20
ns From
O.BV
to 2.0V
12
12 ns From
2.0V to
O.BV
A.C. TESTING LOAD CIRCUIT
DEVICE
UNDER
I}
C
L=100
P
F
TEST
":'
C
L
INCLUDES JIG CAPACITANCE
54
AFN-00826D