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CHAPTER 3
HARDWARE
DESIGN
INTRODUCTION
This chapter discusses the hardware design of
iAPX
88
systems. First, the pins and signals
of the
8088
CPU are functionally described
for simple, but powerful iAPX
88
systems.
The timings of
8088
signals are explained,
and how they cleanly interface the
8088
CPU
with the rest of the system.
Other parts of the iAPX
88
system are dis-
cussed including, the clock generator, reset
and wait state circuits.
Interrupt handling follows, leading into a
description of maximum mode iAPX
88
systems.
8088
CPU
Pin Functions
The functions of the
8088
CPU pins, are
categorized by these groups (Fig.
3-1):
1)
Address
2)
Data
3)
Control and Status
4)
Timing
5)
Power/Ground
GND
A14
A13
A12
A11
A10
A9
A8
AD7
AD6
INTR
8088
CPU
38 A18/S3
37
A171S4
36
A181S5
35 A19/S6
34
SSO
33
MN/!.lX
32
iiii
31
HOLD
30
HLDA
29
WR
28
101M
27
DTti'!
26
DEN
25
ALE
24
iNTA
23
TEST
22
READY
21
RESET
Figure 3-1. 8088 CPU Pins
3-1
The number of pins in each group varies. The
only pin in the Timing group
is
the clock,
while others, such as the Address and Data
groups, use many pins and are multiplexed
with other functions.
The
8088
pins and their functions are briefly
described here.
For
more information, con-
sult the iAPX 88/10 data sheet
(see
pg.
37
of
Appendix) and the iAPX 86,
88
Family
User's Manual.
ADDRESS AND DATA
The
8088
CPU uses
20
pins to directly
address up to one million bytes
of
memory.
Some address pins are multiplexed to also
function as data or status pins. Thus, the
8088
provides all necessary signals from a
40-pin package.
The address pins are discussed below in these
three groups:
1)
ADo-AD7' Drives the lower eight address
bits and also the iAPX 88's 8-bit data bus.
2)
As-AIS' Address bits
8-15.
3)
AI6-AI9. Drives the upper 4 bits of the
iAPX
88's
20
bit address bus; also generates
status signals.
ADO-AD7
Pins ADo through AD7 are time-multiplexed
in the iAPX
88
system to serve as both
address and data lines (Fig. 3-2). At the
beginning of every machine cycle, the lower 8
address bits are driven on these pins. Later in
the machine cycle, these pins function
as
the
8-bit data bus. At this time, ADo-AD7 may
be inputs or outputs, depending on whether
the
8088
is
reading or writing data to or from
the system.
These lines float to 3-state
OFF
during inter-
rupt acknowledge and local
bus
"hold acknow-
\
ledge."