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SAR
SHIFT
ARITHMETIC
RIGHT
SAR
Encoding:
111
01
00
v w 1 mod
111
rim
I
ifv=OthenCOUNT=1
else COU NT = (CL)
SAR Operands Clocks*
register,
1
2
register, CL
8+
4/bit
memory,
1 15(23) + EA
memory,
CL
20(28)
+ EA +
41
bit
Transfers Bytes SAR Coding Example
-
2
SAR
OX,
1
-
2 SAR
01,
CL
2
2-4
SAR
N~BLOCKS,
1
2
2-4
SAR
N~BLOCKS,
CL
*b(w):
where
b
denotes
the
number
of
clock
cycles
for
byte
operands
and
w
denotes
the
number
of
clock
cycles
for
word
operands.
2-146