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ARCHITECTURE AND INSTRUCTIONS
Accumulator-Specific
Transfers
Three accumulator-specific transfer opera-
tions are provided:
IN transfers a byte (or word) from an input
port to the AL register (or AX register for a
word). The port
is
specified either with
an
inline data byte, allowing fixed access to
ports
0 through 255, or with a port number in
the
DX
register, allowing variable access to
64K input ports.
OUT
is
similar to
IN
except that the transfer
is
from the accumulator to the output port.
XLAT performs a table lookup byte transla-
tion. The AL register
is
used as
an
index into
a 256-byte table whose base
is
addressed by
the
BX
register. The byte operand so selected
is
transferred to AL.
Address-Object Transfers
Three address-object transfer operations are
provided:
LEA (load effective address) transfers the
off-
set address of (rather than its value) to the
destination operand. The source operand must
be a memory operand and the destination
operand must be a
16-bit
general, pointer, or
index register.
LDS
(load pointer into DS) transfers a
"pointer-object" (i.e., a 32-bit object contain-
ing an offset address and a segment address)
from the source operand (which must be a
memory operand) to a pair of destination
registers. The segment address
is
transferred
to the DS segment register. The offset
address must be transferred to a l6-bit
gen-
eral, pointer, or index register.
LES (load pointer into ES)
is
similar to LDS
except that the segment address
is
transferred
to the ES segment register.
Flag Register Transfers
Four flag register transfer operations are
provided:
LAHF
(load
AH
with flags) transfer the flag
registers SF, ZF, AF, PF, and
CF
(the 8080
flags) into specific bits of the
AH
register.
SAHF
(store
AH
into flags) transfers specific
bits of the
AH
register to the flag register, SF,
ZF, AF, PF, and CF.
PUSHF
(push flags) decrements the
SP
reg-
ister by two and transfers all of the flag
registers into specific bits of the stack element
addressed by SP.
POPF
(pop flags) transfers specific bits of the
stack element addressed by the
SP
register to
the flag registers and then increments
SP
by
two.
Arithmetic Instructions
The
8088
provides the four basic mathemati-
cal operations in a variety of instructions.
Both
8-
and l6-bit operations and both
signed and unsigned arithmetic are provided.
Standard twos complement representation of
signed values
is
used. The addition and sub-
traction operations serve
as
both signed and
unsigned operations to be made
(see
Condi-
tional Transfer). Correction operations allow
arithmetic to be performed directly on
packed or unpacked decimal numbers.
Flag Register Settings
Six flag registers are set or cleared by arith-
metic operations to reflect results of the
operation. They generally follow these rules:
CF
is
set if the operation results in a carry out
'of (from addition) or a borrow into (from
subtraction) the high-order bit of the result;
2-11
otherwise
CF
is
cleared. .
AF
is
set if the operation results in a carry
out of (from addition)
or
a borrow into (from
subtraction) the low-order four bits of the
result; otherwise
AF
is
cleared.
ZF
is
set
if
the result of the operation
is
zero;
otherwise
ZF
is
cleared.
SF
is
set
if
the high-order bit of the result of
the operation
is
set; otherwise
SF
is
cleared.