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iAPX 88/10
• The queue length is 4 bytes
in
the
8088,
whereas the
8086 queue contains 6 bytes,
or
three words. The
queue was shortened
to
prevent overuse
of
the bus by
the
BIU
when prefetching instructions. This was
re-
quired because
of
the additional
time
necessary
to
fetch instructions 8
bits
at a time.
• To further optimize the queue, the prefetching algo-
rithm was changed. The 8088
BIU
will fetch a new in-
struction
to
load into the queue each time there is a 1
byte
hole (space available)
in
the queue. The 8086
waits
until a 2-byte space is available.
•
The internal execution time of the instruction set is
affected
by
the 8-bit interface. All 16-bit fetches and
writes
fromlto memory take
an
additional four
clock
cycles. The
CPU
is also limited
by
the speed
of
in-
struction fetches. This latter problem only occurs
when a series of
simple operations occur. When the
more sophisticated instructions
of
the 8088
are
being
used, the queue has time
to
fill and the execution pro-
ceeds
as
fast
as
the execution unit will allow.
The
8088
and 8086 are completely software compatible
by
virture
of
their identical execution units. Software
that is system dependent may not
be
completely trans-
ferable,
but software that is not system dependent will
operate
eq
ually
as
well on
an
8088
or
an
8086.
50
The hardware interface of the
8088
contains the major
differences between the
two
CPUs. The pin assign-
ments are nearly identical, however, with the following
functional
changes:
• A8-A15 - These pins are only address outputs on the
8088.
These address lines are latched internally and
remain
valid throughout a bus cycle in a manner
similar to the 8085 upper address lines.
•
BHE has no meaning
on
the 8088 and has been elimi-
nated.
•
SSO
provides the
SO
status information in the mini-
mum mode. This output occurs on pin 34
in
minimum
mode
only.
DT/R,
101M,
and
SSO
provide the complete
bus status
in
minimum mode.
•
101M
has been inverted to
be
compatible with the
MCS-85 bus structure.
• ALE is delayed by one
clock
cycle in the minimum
mode when entering HALT,
to
allow the status to
be
latched with ALE.
AFN-008260