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ARCHITECTURE
AND
INSTRUCTIONS
3)
Setting
TF
(the trap flag) puts the proces-
sor into single-step mode for debugging. In
this mode, the
CPU automatically generates
an
internal interrupt after each instruction,
allowing a program
to
be inspected as it exe-
cutes instruction by instruction.
Instruction Pointer
The 16-bit instruction pointer (IP), as shown
in Figure
2-2,
is
analogous to the program
counter (PC) in the
8080/8085 CPUs and
points to the next instruction. The instruction
pointer contains the offset (distance in bytes)
of the next instruction from the beginning of
the current code segment. During normal
execution,
IP
contains the offset of the next
instruction to be fetched. Whenever
IP
is
saved on the stack, however, it first
is
auto-
matically adjusted to point to the next
instruction to
be
executed. Programs do not
have direct access to the instruction pointer,
but instructions cause it to change and to be
saved on and restored from the stack.
Stack Implementation
The 8088's stack
is
implemented in memory
and
is
located by the stack segment register
(SS) and the stack pointer register (SP). A
system may have
an
unlimited number of
stacks, and a stack may be up to 64K bytes
long, the maximum length of a segment. (An
attempt to expand a stack beyond 64K bytes
overwrites the beginning of the stack).
One
stack
is
directly addressable
at
a time; this
is
the current stack often referred to simply as
"the" stack.
SS
contains the base address of
the current stack and
SP
points to the top of
the stack
(TOS). In other words,
SP
contains
the offset
of
the top
of
the stack from the
stack segment's base address. Note, however,
that the stack's base address (contained in
SS)
is
not the "bottom" of the stack.
Instructions that operate on a stack add or
remove one word (2 bytes)
at
a time. An item
is
pushed
onto the stack by decrementing
SP
by 2 and writing the item
at
the new TOS. An
2-5
item
is
popped
off
the stack by copying it
from
TOS and incrementing
SP
by
2.
In
other words, the stack
grows'
down in
memory toward its base address: Stack oper-
ations never move items on the stack, nor do
they
t:rase them. The top of tbe stack changes
only as a result
of
updating the stack pointer.
ADDRESSING MODES
Instructions in the
8088
usually perform
operations on one
or
two source operands,
with the result overwriting one
of
the oper-
ands. The first operand of a two-operand
instruction can be usually either a register
or
a memory location; the second operand can
be either a register or a constant within the
instruction. (The terms first and second oper-
and are used to distinguish the operands only
- their use does not imply directionality for
data transfers). Typical formats for two-
operand instructions are shown in Figure
2-4.
Single-operand instructions generally allow
either a register or a memory location to
serve as the operand. Figure
2-4 also shows a
typical one-operand format. Virtually all
8088
operators may, specify
8-
or 16-bit
operands.
Memory Operands,
An instruction may address an operand resid-
ing in memory in one
of
the following ways,
as determined by the
"mod" and
"r
/ m" field
in the instruction (Fig.
2-5):
DIRECT ADDRESSING
-16-bit
offset address
contained in the instruction.
INDIRECT
ADDRESSI~G
- optionally with
an
8-
or 16-bit displacement contained in the
instruction:
1)
through a base register (BP
or
BX)
2)
through an index register (SI or DI)
3)
through the sum of a base register and
an
index register