Filter
Top Products
ARCHITECTURE AND INSTRUCTIONS
TWO OPERAND FORMAT, SECOND OPERAND IS REGISTER
[
001Ls~<[IIiu
OPCODE
10
I
wi
I MOD I
REG
I
RIM
I
(optional)
[=
---
61SP-LO:=:=::J
[==~~-HI:==J
(optional)
(optional)
TWO OPERAND FORMAT, SECOND OPERAND
,IS
CONSTANT
[001
I S E G I
Ii
U I 0
PCO
DE
I S I w I r-I
M-:-:O-=-D"T"I
O=-:P:""':C-=-O-=-D
E=-II"::R""':":I
M-:-11
(optional)
[==DISP-LO
:==:1
[==
DISP~C=:=J
DATA-LO
(optional)
(optional)
[==~TA~~=::J
(optional)
ONE OPERAND
FORMAT
.[001J)l
G
I110J
OPCODE
Iw
I
I MOD IOPCODE I
RIM
I
(optional)
[==~SP-~
=J
[==61~-HI==J
(optional) (optional)
FOR
DEFINITION
OF
MOD AND RIM FIELDS, SEE FIGURE 2-5.
OTHER
BIT
FIELDS:
w =
0:
8-BIT OPERAND(S)
1:
16-BIT OPERAND(S)
o =
0:
DESTINATION
IS
FIRST OPERAN 0
1:
DESTINATION
IS
SECOND OPERAND
S
=
0:
DATA = DATA HI, DATA
LO
}
APPLIES
IF
1:
DATA = DATA-LO SIGN EXTENDED
W=1
"
SEG: SEGMENT
REG
REGISTER
00
ES
a-BIT 16-BIT
01
CS
10
SS
REG:
(W
=
0)
(W=
1)
11
OS
000
AL
AX
001
CL
CX
010
DL
OX
011
BL
BX
100
AH
SP
101
CH
BP
110
DH
SI
111
BH
01
Figure 2-4. Defining Bits in Instructions with One and Two Operands
2-6